Structured Digital Design Lab

This class was the 2nd semester of digital design; a followup to "Digital Design Lab." In Structured Digital Design we took a programmatic approach to our design, simulation, and testing of digital circuits using VHDL. VHDL stands for VHSIC Hardware Description Language where VHSIC is the name of the US government program that developed it. A hardware description language is a specialized language that describes the structure and behavior of digital logic circuits and gives us the power to design much more complex circuits. All of the projects in this course were written in VHDL and simulated using ModelSim.

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Labs

With these labs, we designed circuits by writing VHDL code entities and describing their behavior in the entity's architecture. In the real-world VHDL files can be read by a logic synthesizer that turns the code into a digital logic circuit. In this course we tested our VHDL entities in ModelSim by simulating input signals and observing the output.

• Lab 1 - 1-bit Full Adder (Behavioral Method)

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  An introduction to VHDL. With this lab we described a simple 1-bit full adder as a VHDL entity using the behavioral method. This means we defined the adder's input and output ports and used logical VHDL statements to describe the behavior we want our adder to perform. This allows a synthesizer to design the circuit itself to achieve our desired behavior.

  

  

• Lab 2 - 1-bit Full Adder (Structural Method)

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  We designed the same adder from lab 1 using the structural method. By comparison, rather than allowing the synthesizer to design our circuit, we defined entities to represent logic gates and specified exactly how we want our circuit to look.

  

  

• Lab 3 - 4-bit Register and Tri-State Buffer

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  We designed two slightly more complex circuits - a 4-bit register and 4-bit tri-state buffer. A register is a synchronous component that holds memory and input/outputs it on a clock cycle. A tri-state buffer is a register that adds the ability to "hold" its data and only output it when specified. We designed these using the behavioral method.

  

  

  

• Lab 4 - 16-bit Calculator

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  I designed a 16-bit calculator and simulated it both in ModelSim and on an Altera DE-2 programmable logic board. This calculator is able to perform addition, subtraction, and some boolean algebra. The design calls for an output bus of one nibble (half a byte or 4 bits) meaning only 4 bits may be sent to the output at once. To accomplish this four 4-bit registers and tri-state buffers are used to store the result and allow the user to choose which nibble will be sent to the output. In this design both behavioral and structural components are used.

  

  

  

Projects

• Arithmetic Logic Unit (ALU)

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  An ALU is a core component of virtually every processor. It performs arithmetic and bitwise operations on binary numbers. Our ALU is 16 bits and supports 16 operations including additions, subtractions, and 5 logical operations. It outputs a 16-bit result as well as 6 status codes.

  

  

  

  

• Multiplier Accumulator (MAC)

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  The multiply-accumulate unit is a widely-used circuit whose function is to perform multiplication on two numbers and add that product to an accumulator. This function is crucial to performing convolution and the Fast Fourier Transform (FFT), common algorithms in digital signal processors. Our MAC unit is 16 bits and is also capable of performing multiplication with cumulative subtraction as well as single-cycle multiplication.

  We designed all of the components of our circuit behaviorally and then designed our top-level circuit structurally using these components. We tested the circuit on ModelSim and also downloaded the two main components - the multiplier and add/subtract component - onto an Altera programmable logic board to visualize our results. Like before, we had to scale down the components to 4 bits to fit on the board.